Designing 2D and 3D Network-on-Chip Architectures

Designing 2D and 3D Network-on-Chip Architectures

EnglishPaperback / softbackPrint on demand
Tatas Konstantinos
Springer-Verlag New York Inc.
EAN: 9781493945504
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Detailed information

This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliability. Case studies are used to illuminate new design methodologies.
EAN 9781493945504
ISBN 1493945505
Binding Paperback / softback
Publisher Springer-Verlag New York Inc.
Publication date August 23, 2016
Pages 265
Language English
Dimensions 235 x 155
Country United States
Readership Professional & Scholarly
Authors Jantsch Axel; Siozios Kostas; Soudris, Dimitrios; Tatas Konstantinos
Illustrations XIII, 265 p. 144 illus., 79 illus. in color.
Edition Softcover reprint of the original 1st ed. 2014
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