ASIC Implementation of Low Power FP-AU using Reversible Logic

ASIC Implementation of Low Power FP-AU using Reversible Logic

EnglishPaperback / softbackPrint on demand
Krishnasamy Natarajan, Vijeyakumar
LAP Lambert Academic Publishing
EAN: 9786139587056
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Detailed information

This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.
EAN 9786139587056
ISBN 6139587050
Binding Paperback / softback
Publisher LAP Lambert Academic Publishing
Pages 52
Language English
Dimensions 220 x 150 x 3
Authors Bojan, Vinoth Kumar; Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi